The present invention relates to growth of epitaxial semiconductor layers, and more particularly to a process for growing an epitaxial semiconductor layer on a semiconductor substrate to reduce the number of crystallographic defects that propagate into the epitaxial layer from the substrate.
Integrated circuits have revolutionized virtually all areas of human activity. Although the processes for manufacturing integrated circuits are extremely complex and expensive, manufacturers have developed mass production techniques to reduce the costs per integrated circuit (unit cost) to a few dollars for most circuits. As a result, millions of integrated circuits are incorporated into a diverse array of consumer, industrial, and military products each year.
However, the integrated circuit manufacturing industry is one of the most competitive in the world. Even a small increase or decrease in a manufacturer""s unit cost can have a dramatic impact on the manufacturer""s profits or market share. To remain competitive in this market, integrated circuit manufacturers must continuously strive to reduce their unit cost by increasing both yield and throughput.
Yield is a measure of the number of integrated circuits that are free of fatal defects (i.e., defects which prevent the circuit from functioning properly). Integrated circuits are typically manufactured on semiconductor wafers. Depending on the relative sizes of the wafer and integrated circuit, a single wafer may contain from just a few, to hundreds of integrated circuits. Yield is usually expressed as the average percentage of integrated circuits per wafer, which are free of fatal defects. Yield may be measured at the end of a particular processing step, or may be measured at the end of the entire manufacturing process. In either case, a higher yield means that manufacturing costs are spread over a larger number of integrated circuits, thus reducing the unit cost.
Throughput is a measure of the number of integrated circuits which are manufactured in a particular time period. Throughput is sometimes expressed as the number of xe2x80x98wafers per hourxe2x80x99 which are cycled through a particular process such as an epitaxial reactor. If the throughput of an epitaxial reactor is increased, then fewer reactors are needed to process a given number of wafers, thus saving capital equipment expenditures and reducing the unit cost.
Unfortunately, yield and throughput can be conflicting goals. Modifications to the manufacturing process that are intended to increase throughput often result in lower yield, and vice versa. As a result, manufacturers typically must make compromises between maximum yield and maximum throughput to minimize their unit cost. One integrated circuit manufacturing process in which this yield versus throughput conflict arises is epitaxy.
Epitaxy generally involves the growth or deposition of a single-crystal layer of semiconductor material on the surface of a semiconductor substrate of the same material such that the epitaxial layer has the same crystal orientation as the underlying substrate. Many modern integrated circuits are formed in epitaxial semiconductor layers on a semiconductor substrate rather than in the substrate itself. Therefore, growth of high quality epitaxial layers at low cost is an important goal for many integrated circuit manufacturers.
Two important characteristics that determine the quality of an epitaxial layer, and thus the yield of the manufacturing process, are the number of crystallographic defects and the transition width. Crystallographic defects are non-uniformities in the crystal structure of the epitaxial layer. Many of these crystallographic defects are caused by defects or impurities in the substrate surface, which then propagate into the epitaxial layer during epitaxial growth. Stacking faults are a common example of such crystallographic defects, which can cause operating failures in circuits formed in the epitaxial layer. Thus, a reduction in these defects may increase yield.
The transition width describes the thickness of the region of the epitaxial layer adjacent the substrate where the dopant concentration is higher or lower than in the remainder of the epitaxial layer due to diffusion of dopants into and/or out of the substrate. If the transition width extends into the area of the epitaxial layer in which circuits are formed, the circuits may not function properly. Thus, a reduction in transition width may increase yield.
One of the most effective ways to reduce the cost of an epitaxy process step is to increase the throughput of the epitaxial reactor by increasing the growth rate of the epitaxial layer. A higher growth rate means reducing the time needed to grow an epitaxial layer of a particular thickness, which allows more wafers to be processed in a given time period.
However, increased growth rates typically lead to increased defects in the epitaxial layer. Further, one of the primary techniques for increasing the growth ratexe2x80x94raising the temperature of the substrate during growthxe2x80x94causes increased dopant diffusion, thereby increasing the transition width. As a result, manufacturers often must compromise between high throughput and high yield to minimize their unit costs.
Therefore, it would be desirable to have a process for growing an epitaxial semiconductor layer at a high growth rate to improve throughput, while also improving yield by reducing the number of crystallographic defects and the transition width. Such a process could significantly reduce a manufacturer""s unit cost.
The invention provides a method of growing epitaxial semiconductor layers with reduced crystallographic defects while maintaining or improving throughput and maintaining or reducing transition width. As a result of the process conditions under which the epitaxial layer is grown, an initial portion of the epitaxial layer serves to cover or occlude defects in the surface of the substrate and therefore acts as a low-defect seed layer by preventing defects in the surface of the substrate from propagating into the remainder of the epitaxial layer. The remainder of the epitaxial layer may therefore have the thickness and dopant concentration required for a particular integrated circuit manufacturing process, but it is protected from many defects that might otherwise propagate thereinto from the surface of the substrate by the initial portion of the epitaxial layer. As a result, the method of the present invention may advantageously increase the yield without reducing the throughput.
According to the present invention, the epitaxial layer is initially grown on the surface of the semiconductor substrate at a first growth rate, prior to altering the process conditions and growing the remainder of the epitaxial layer at a second growth rate that equals or exceeds the first growth rate. By initially growing the epitaxial layer at a slower growth rate, defects in the semiconductor substrate may be masked by an initial portion of the epitaxial layer that is grown somewhat slowly and is of relatively high quality. Thereafter, the growth rate may be increased and the majority of the epitaxial layer may be deposited at the higher growth rate so as to increase the overall efficiency of the epitaxial deposition process while continuing to build upon the initial portion of the epitaxial layer that is of relatively high quality.
The method of the present invention may also etch the semiconductor substrate prior to and/or during the growth of the initial portion of the epitaxial layer in order to reduce the defects in the semiconductor substrate and to correspondingly reduce propagation of those defects throughout the epitaxial layer. The etching of the semiconductor substrate and/or the initial portion of the epitaxial layer is at least reduced and, more commonly, eliminated during the growth of the remainder of the epitaxial layer at the increased growth rate.
According to one embodiment, the semiconductor substrate may be maintained at a constant temperature while etching the semiconductor substrate and growing the entire epitaxial layer. Alternatively, the temperature of the semiconductor substrate may be decreased during the etching of the semiconductor substrate and/or during the growth of the initial portion of the epitaxial layer. As such, the continued growth of the epitaxial layer may be at a lower temperature than that at which at least a portion of the epitaxial layer is initially grown.
The flow rate of the source gas that is passed over the semiconductor substrate during the epitaxial growth process may be increased following the growth of the initial portion of the epitaxial layer while the remainder of the epitaxial layer is grown. As such, the continued growth of the epitaxial layer may proceed at a growth rate that is greater than the rate at which the initial portion of the epitaxial layer was grown, even though the temperature has been decreased in some embodiments. Thus, the method of the present invention provides the twin benefits of effectively covering the defects in the semiconductor substrate with a relatively high purity epitaxial layer that is grown somewhat slowly and then growing the majority of the epitaxial layer at a much greater growth rate, thereby increasing the overall efficiency of the epitaxial deposition process.
The method of the present invention may also remove oxide from the semiconductor substrate prior to growth of the epitaxial layer. In this regard, the oxide may be removed by baking the semiconductor substrate or by exposing the semiconductor substrate to an etchant containing hydrofluoric acid. Following the completion of the growth of the epitaxial layer, an oxide layer may be grown thereupon for protection, if desired. Both the pre-epitaxial oxide removal and the post-epitaxial oxide deposition may occur within or exterior to the epitaxial chamber.